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cimforreduceloss
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37 Commits

Author SHA1 Message Date
dmy@lab 7802a7961d 1.加入几句代码只对有DG的线路做合并 
2.把合并后总的头节点到每条线路头节点的阻抗改小为0.00001

Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-03-12 22:42:40 +08:00
dmy@lab 29828700d2 1.如果负荷路径为空就不打开。 
2.把所有负荷24时段输出到一个文件中。

Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-02-05 16:00:42 +08:00
dmy@lab 3345e00fbd 把DG加进去了 
Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-02-01 13:52:43 +08:00
dmy@lab d0b9071577 1.修复了单例模板的bug 
2.正在加DG

Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-30 21:34:31 +08:00
dmy@lab 7947ddc9b1 1.给SWTICH的空node一个虚拟名称。 
2.修复了getSubstationLoad的bug，要先判断再返回。

Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-22 14:12:49 +08:00
dmy@lab 1c9f65b6cd 利用文件中独读到的线路头节点ID 
Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-22 11:09:20 +08:00
dmy@lab 8f512b0242 改成用XML来形成拓扑树 
Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-21 14:03:07 +08:00
dmy@lab 479bfc778a 1.修复子类初始化问题 
2.加了id字段

Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-20 21:24:33 +08:00
dmy@lab 8d5fcf9c95 1.把负荷文件路径加入CIMParser中。 
2.把变压器也处理成双端支路。

Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-20 13:19:28 +08:00
dmy@lab 15718e1990 数据的问题，不管了。 
Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-19 13:33:29 +08:00
dmy@lab 735226f06a 返回Breaker的EquipmentMemberOf_EquipmentContainer 
Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-18 18:18:18 +08:00
dmy@lab 88ca00c78b 小调试 
Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-17 22:31:06 +08:00
dmy@lab 9259da0e93 1.修复了上一次提交的bug 
2.修复了from和to中的to不是node的bug

Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-15 17:31:41 +08:00
dmy@lab 5cd6849e95 有可能会访问到重复的元件，如果是已经访问过的就不添加了。 
Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-15 17:19:06 +08:00
dmy@lab c1b2c0e367 很多输出都注释掉。 
Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-08 21:32:33 +08:00
dmy@lab ac08caee2a 暂时先把几个不用的sub项目隐去 
Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-08 11:19:31 +08:00
dmy@lab bdb5c72fa2 文件名一直是乱码。 
Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-08 10:13:29 +08:00
dmy@lab 1e3ad32bfa 用QTextStream来输出Container的信息。 
Signed-off-by: dmy@lab <dmy@lab.lab>
 2015-01-07 21:57:50 +08:00
facat@lab.com cd22eecbca 1.加入Task文件，准备批量做。 
2.把Task文件接入流程。

Signed-off-by: facat@lab.com <facat@lab.com>
 2015-01-06 20:51:19 +08:00
facat@lab.com 8a994253b9 加了一些变压器统计的代码。 
Signed-off-by: facat@lab.com <facat@lab.com>
 2015-01-03 22:22:54 +08:00
facat@lab.com af8f64dfd0 测试了自动编号功能 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-28 17:49:16 +08:00
facat@lab.com 9cb2f5a8f6 用CIMExporter分别处理读到的线路，开关，变压器等元件。 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-28 16:40:57 +08:00
facat@lab.com 28e1df38fa 删除一些不需要的注释 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-28 15:33:25 +08:00
facat@lab.com 45a76228c4 进过测试几个文件，拓扑解析基本上能用了。 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-26 11:49:42 +08:00
facat@lab.com 32e3e9cfb1 用一些dirty的方法，判断是不是V馈线站 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-26 11:22:10 +08:00
facat@lab.com 432724f3d2 加入判别是否是需要的Disconnector 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-25 21:54:03 +08:00
facat@lab.com edfb3310f8 加了处理Disconnector连接关系的代码 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-25 21:35:06 +08:00
facat@lab.com a012ca3502 显示输出遇到的Substation的名字 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-25 16:21:20 +08:00
facat@lab.com 9a70026cf3 拓扑解析也完成了，虽然用了一些dirty的方法。 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-25 11:44:46 +08:00
facat@lab.com 14476a7939 给Breaker增加NamingDescription 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-12 17:38:45 +08:00
facat@lab.com e587ab8667 加Breaker状态显示。 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-12 17:13:39 +08:00
facat@lab.com eadb1dedf3 吧ACLineSegment的lineName换乘了namingDescription 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-12 16:41:36 +08:00
facat@lab.com 936c4a7e6f 增加开关状态 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-11 20:32:49 +08:00
facat@lab.com 2e46068680 加了Substation的类 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-11 19:57:55 +08:00
facat@lab.com d6bcb9a0c5 重新优化了TopologyRecorder的结构，代码更合理。 
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-09 22:03:56 +08:00
facat@lab.com 000f9b89fa 1.注释掉一些不用的输出 
2.删掉一些错误的注释

Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-06 22:12:17 +08:00
facat@lab.com 69cd117f35 1.修复了一些类的isTerminal没有被初始化的bug 
2.修复了一些地方判断下一个Terminal的bug
Signed-off-by: facat@lab.com <facat@lab.com>
 2014-12-06 21:48:07 +08:00