把短阻抗改为0.0001

Signed-off-by: dmy@lab <dmy@lab.lab>
This commit is contained in:
dmy@lab
2015-03-10 20:12:24 +08:00
parent feae41d9ea
commit 5825d156f6
4 changed files with 12 additions and 7 deletions

View File

@@ -119,7 +119,12 @@ class MergeReconfigFile: # 合并重构用文件
indGround = 1
addNum = 1
# offsetNodeNum = {} #记录每个一个文件在新文件里节点的偏移量
count=1
for f in fileList:
# if count>10:
# print(f)
# break
count+=1
ipsodata = iPsoData(f)
#节点数 可重构支路数
self.__basicInfo[0][0] += len(ipsodata.GetNodePower())
@@ -156,7 +161,7 @@ class MergeReconfigFile: # 合并重构用文件
addNum += len(ipsodata.GetNodePower())
#用一个总的头节点把之前所有线路的头节点连接起来
for b in self.__balanceNodeOffset:
self.__mergedIpsoLine.append ([indLine, 1 , b, 0.01, 0.01, 0, 0])
self.__mergedIpsoLine.append ([indLine, 1 , b, 0.0001, 0.01, 0, 0])
self.__basicInfo[0][1]+=1
indLine+=1
self.__mergedIpsoLoad.insert(0,[1, n[1], 1,n[3], 0, 0, 0, 0, 0, 0])
@@ -191,7 +196,7 @@ class MergeReconfigFile: # 合并重构用文件
f.write('0\n')
f.write('0\n')
for g in self.__mergedIpsoGround:
f.write('%d %d %f %f\n' % (g[0], g[1], b[2],b[3]))
f.write('%d %d %f %f\n' % (g[0], g[1], g[2],g[3]))
f.write('0\n')
f.write('0\n')
f.write('0\n')